View W24L011A_146631.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

W24L011A 128K x 8 HIGH SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W24L011A is a high speed, low power CMOS static RAM organized as 131072 x 8 bits that operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high performance CMOS technology.
FEATURES
* * * *
High speed access time: 10/12/15 nS Single +3.3V power supply Center power/ground pin configuration Fully static operation
* * *
All inputs and outputs directly TTL compatible Three-state outputs Available packages: 32-pin 300 mil and 400 mil SOJ
PIN CONFIGURATION
BLOCK DIAGRAM
VDD VSS A0 . . A16
A0 A1 A2 A3 CS I/O1 I/O2 VDD VSS I/O3 I/O4 WE A4 A5 A6 A7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
A16 A15 A14 A13 OE I/O8 I/O7 VSS VDD I/O6 I/O5 A12 A11 A10 A9 A8
DECODER
CORE ARRAY
CS OE WE CONTROL DATA I/O
I/O1 . . I/O8
PIN DESCRIPTION
SYMBOL A0-A16 I/O1-I/O8 CS WE OE VDD VSS DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Inputs Write Enable Input Output Enable Input Power Supply Ground
-1-
Publication Release Date: August 1999 Revision A2
W24L011A
TRUTH TABLE
CS H L L L
OE WE
MODE Not Selected Output Disable Read Write
I/O1-I/O8 High Z High Z Data Out Data In
VDD CURRENT ISB, ISB1 IDD IDD IDD
X H L X
X H H L
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER Supply Voltage to VSS Potential Input/Output to VSS Potential Allowable Power Dissipation Storage Temperature Operating Temperature RATING -0.5 to +4.6 -0.5 to VDD +0.5 1.0 -65 to +150 0 to +70 UNIT V V W C C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
Operating Characteristics
(VDD = 3.3V 5%, VSS = 0V, TA = 0 to 70 C)
PARAMETER Input Low Voltage Input High Voltage
Input Leakage Current
SYM. VIL VIH ILI ILO
TEST CONDITIONS VIN = VSS to VDD VI/O = VSS to VDD CS = VIH (min.) or OE = VIH (min.) or WE = VIL (max.)
MIN. -0.5 +2.0 -10 -10
TYP. -
MAX. 0.8 VDD +0.5 +10 +10
UNIT V V A A
Output Leakage Current
Output Low Voltage Output High Voltage Operating Power Supply Current Standby Power Supply Current
VOL VOH IDD
IOL = +8.0 mA IOH = -4.0 mA CS = VIL (max.), I/O = 0 mA
Cycle = mim., Duty = 100%
2.4 10 12 15 -
-
0.4 130 120 110 30 10
V V
mA mA mA
ISB ISB1
CS = VIH (min.) CS VDD -0.2V
Note: Typical characteristics are at VDD = 3.3V, TA = 25 C.
-2-
W24L011A
CAPACITANCE
(VDD = 3.3V, TA = 25 C, f = 1 MHz)
PARAMETER Input Capacitance Input/Output Capacitance
SYM. CIN CI/O
CONDITIONS VIN = 0V VOUT = 0V
MAX. 8 10
UNIT pF pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level Output Load 0V to 3V 3 nS 1.5V CL = 30 pF, IOH/IOL = -4 mA/8 mA CONDITIONS
AC Test Loads and Waveform
R1 320 ohm R1 320 ohm 3.3V OUTPUT OUTPUT 30 pF Including Jig and Scope R2 350 ohm 5pF Including Jig and Scope R2 350 ohm 3.3V
(For TCLZ, T OLZ, TCHZ, TOHZ, TWHZ, TOW )
3.0V
90% 10% 3 nS 10%
90%
0V
3 nS
-3-
Publication Release Date: August 1999 Revision A2
W24L011A
AC Characteristics, continued (VDD = 3.3V 5%, VSS = 0V, TA = 0 to 70 C)
Read Cycle
PARAMETER SYM.
W24L011A-10 MIN. MAX. 10 10 5 5 5 W24L011A-12 MIN. 12 3 0 3 MAX. 12 12 6 6 6 W24L011A-15 MIN. 15 3 8 8 MAX. 15 15 8 3
UNIT
Read Cycle Time Address Access Time Chip Select Access Time Output Enable to Output Valid Chip Selection to Output in Low Z Output Enable to Output in Low Z Chip Deselection to Output in High Z Output Disable to Output in High Z Output Hold from Address Change
TRC TAA TACS TAOE TCLZ TOLZ* TCHZ TOHZ* TOH
10 3 0 3
nS nS nS nS nS nS nS nS nS
* These parameters are sampled but not 100% tested.
Write Cycle
PARAMETER SYM.
W24L011A-10 MIN. MAX. W24L011A-12 MIN. 12 10 10 0 10 0 MAX. W24L011A-15 MIN. 15 12 12 0 12 0 MAX.
UNIT
Write Cycle Time Chip Selection to End of Write Address Valid to End of Write Address Setup Time Write Pulse Width Write Recovery Time CS ,
WE
TWC TCW TAW TAS TWP TWR
10 9 9 0 9 0
-
nS nS nS nS nS nS
Data Valid to End of Write Data Hold from End of Write Write to Output in High Z Output Disable to Output in High Z Output Active from End of Write
TDW TDH TWHZ* TOHZ* TOW
5 0 0
5 5 -
7 0 0
6 6 -
9 0 0
8 8 -
nS nS nS nS nS
* These parameters are sampled but not 100% tested.
-4-
W24L011A
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled, CS = OE = VIL, WE = VIH)
TRC Address TAA TOH
TOH D OUT
Read Cycle 2
(Chip Select Controlled)
T RC Address
CS T ACS TCLZ D OUT TCHZ
Read Cycle 3
(Output Enable Controlled)
TRC Address TAA OE TAOE TOLZ CS TACS TCLZ DOUT TCHZ TOH
-5-
Publication Release Date: August 1999 Revision A2
W24L011A
Timing Waveforms, continued
Write Cycle 1
(OE Clock)
TWC Address TWR OE TCW CS TAW WE TAS TOHZ D OUT TDW D IN TDH (1, 4) TWP
Write Cycle 2
(OE = VIL Fixed)
TWC Address TCW CS TAW WE TAS TWP TWHZ (1, 4) DOUT TDW DIN TDH TOH TOW (2) (3) TWR
Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output from DOUT are the same as the data written to DIN during the write cycle. 3. Dout provides the read data for the next address. 4. Transition is measured 200 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
-6-
W24L011A
ORDERING INFORMATION
PART NO. ACCESS TIME (nS) 10 12 15 10 12 15 OPERATING CURRENT MAX. (mA) 130 120 110 130 120 110 STANDBY CURRENT MAX. (mA) 10 10 10 10 10 10 PACKAGE
W24L011AJ-10 W24L011AJ-12 W24L011AJ-15 W24L011AI-10 W24L011AI-12 W24L011AI-15
300 mil SOJ 300 mil SOJ 300 mil SOJ 400 mil SOJ 400 mil SOJ 400 mil SOJ
Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure.
-7-
Publication Release Date: August 1999 Revision A2
W24L011A
PACKAGE DIMENSIONS
32-pin SOJ (300 mil)
Dimension in Inches Dimension in mm
32
17
Symbol A A1 A2 B
E He
Min.
__ 0.020 0.095 0.026 0.016 0.008 0.815 0.295 0.044 0.247 0.325 0.080 __ __ 0
Nom.
__ __ 0.100 0.028 0.018 0.010 0.825 0.300 0.050 0.267 0.335 __ __ __ __
Max.
0.140 __ 0.105 0.032 0.022 0.014 0.835 0.305 0.056 0.287 0.345 __ 0.045 0.004 10
Min.
__ 0.508 2.413 0.660 0.406 0.203 20.701 7.493 1.118 6.274 8.255 2.032 __ __ 0
Nom.
__ __ 2.540 0.711 0.457 0.254 20.955 7.620 1.270 6.782 8.509 __ __ __ __
Max.
3.556 __ 2.667 0.813 0.559 0.356 21.209 7.747 1.422 7.290 8.763 __ 1.143 0.102 10
b c D E e e1
1
16
He L S Y
D
A2
A L
c
e1
S B b
e
A1
Y
Seating Plane
32-pin SOJ (400 mil)
Dimension in inches
32 17
Dimension in mm 3.33 0.635 2.67 0.66 0.41 0.15 2.79 0.71 0.46 0.20 2.91 0.81 0.51 0.28 3.51 3.68
Symbol Min. Nom. Max. Min. Nom. Max.
E
HE
1
16
D c A2 A s Seating Plane b b1 e A1 y L
A A1 A2 b1 b c D E e e1 HE L S y
Notes:
0.131 0.138 0.145 0.025 0.105 0.110 0.115 0.026 0.028 0.032 0.016 0.018 0.006 0.008 0.820 0.825 0.395 0.400 0.044 0.050 0.360 0.37 0.435 0.440 0.082 0.045 0.004 -5 2 6 0.020 0.011 0.830 0.405 0.056 0.380
20.83 20.96 21.08 10.03 1.12 9.15 10.16 10.29 1.27 9.40 1.42 9.65 11.31 1.14 0.10 -5 2 6
0.445 11.05 11.18 2.08
e1
1. Dimension D Max & S include mold flash or tie bar burrs. 2. Dimension b does not include dambar protrusion/intrusion. 3. Dimension D & E include mold mismatch and are determined at the mold parting line. 4. Controlling dimension: Inches 5. General appearance spec. should be based on final visual inspection spec.
-8-
W24L011A
VERSION HISTORY
VERSION A1 A2 DATE August 1997 August 1999 1, 2, 4, 7 PAGE Initial Issued Add 15 nS specification DESCRIPTION
Headquarters
No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792647 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064
Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab.
2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502
Note: All data and specifications are subject to change without notice.
-9-
Publication Release Date: August 1999 Revision A2

▲Up To Search▲

Price & Availability of W24L011A

	To Download W24L011A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .